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ILX585K
24 pin DIP (Plastic)
2 3
1
24
1
1
1
1
1
1
1
2
23 L1 22 4
RS 3 VDD VOUT-R 4
21 CLP
G (main)
R (main)
VOUT-G 6 NC ROG-R ROG-G VDD NC 7 8 9 10 11
B (main)
5
20 GND 19 VOUT-B 18 NC 17 1
G (sub)
R (sub)
B (sub)
10680
10680 10680
10680 10680 10680
16 SW 15 14 13 GND 2 GND
ROG-B 12
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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Block Diagram
VDD
1 2
VDD
1
2
Sub line Overflow Drain
CCD register
D40 D74 D74' S1 S1' S2 S2' S3 S3'
Readout gate
S5340
D75
Main line (Blue) Sub line (Blue)
D40'
D75'
D106'
S5340'
VOUT-B
D106
Driver CCD register CCD register
D40 D74 D74' S1 S1' S2 S2' S3 S3'
ROG-B
Readout gate Readout gate
S5340
D75
Main line (Green) Sub line (Green)
D40'
D75'
D106'
S5340'
VOUT-G
D106
D75' D75
D40
D74 D74' S1 S1' S2 S2' S3 S3'
S5340' S5340
Main line (Red) Sub line (Red)
D40'
VOUT-R
D106' D106
2
SW CLP RS 3 4
Driver CCD register CCD register Readout gate Readout gate
ROG-G
CCD register
Readout gate
Driver
ROG-R
L1 SW
(1200/2400DPI Sensor)
GND
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ILX585K
ILX585K
Pin Description

Recommended Supply Voltage
Clock Characteristics

L1
3
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ILX585K
Clock Frequency 2400 DPI Staggered

Input Clock Pulse Voltage Condition

SW mode
4
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ILX585K
Electrooptical Characteristics (Note 1, 2) (Ta=25cVDD=12V, ffRS=1MHz, Input clock=5Vp-p, Light source=3200K, IR cut filter CM500S (t = 1.0mm)
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ILX585K
Notes: 1. In accordance with the given electrooptical characteristics, the black level is defined as the average value of D40, D41 to D73. 2. For the sensitivity test light is applied with a uniform intensity of illumination. 3. PRNU us defubed as indicated below. Ray iincidence conditions are the same as for Note 2. Vout=500mV(typ.)
PRNU
=
(VMAX - VMIN)/2 VAVE
x
100 [%]
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ILX585K
4. Use below the minimum value of the saturation output voltage. 5. Saturation exposure is defined as follows. SE = Where R indicates RR, RG, RB and SE indicates SER, SEG, SEB. 6. Optical signal accumulated time int stands at 4ms. 7. Supply current means the total current of this device. 8. Vos is defined as indicated bellow. VOUT indicates VOUT-R, VOUT-G, and VOUT-B.
VOUT
VOS GND
9. Random noise is defined on the output waveform with the external clamp and is defined as the standard deviation (sigma) of the output level difference between two adjacent effective pixels under no illumination (i.e.dark conditions) calculated by the following procedure.
CCD output Output waveform (effective pixels under dark condition) CCD output
200ns
200ns V
pixel (n)
pixel (n +1)
a) Two adjacent pixels (pixel n and n + 1) in one reading are fixed as measurement points. b) Each of the output level at video output periods is averaged over 200ns period to get V (n) and V (n + 1). c) V (n + 1) is subtracted from V (n) to get V. V = Vn *|V (n + 1) d) The standard deviation of V is calculated after procedure b) and c) are repeated 30 times (30 readings). V = 1 30
30
i=1
| Vi |
=
1 30
30
i=1
2 (| Vi |*|V)
e) Procedure b), c) and d) are repeated 10 times to get sigma value. f) 10 sigma values are averaged. = 1 10
10 i=1
j
g) value calculated using the above procedure is observed 2 times larger than that measured relative to the ground level. So we specify random noise as follows. ND= 1 2
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Clock Timing Chart 1
2400 DPI Staggered(pixel clamp mode)
ROG 1, L1
5 0
1
5 0 5 0
2
1
2
2 3 4
3
5 0
4
5 0
RS
5 0 5 0
S10679'
S10680'
S10680
D101'
D102'
VOUT
Optical black (34 pixels x 2) Dummy signal (74 pixels x 2) Effective pixels signal (10680 pixels x 2) 1-line output period (10786pixels x 2) Dummy signal (32 pixels x 2)
Note)The transfer pulses (1, 2) must have more than 10786 cycles. The transfer pulses (3, 4) must have more than 21572 cycles. VOUT indicates VOUT-R, VOUT-G, VOUT-B.
D106'
D102
D39'
D40'
D74'
D75'
D78'
D79'
D80'
D39
D40
D74
D75
D79
D80
D1'
S1'
D1
D2
S1
8
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CLP
ILX585K
Clock Timing Chart 2
2400 DPI Staggered(line clamp mode)
ROG 1, L1
5 0
1
5 0 5 0
2
1
2
2 3 4
3
5 0
4 RS
5 0 5 0 5 0
S10679'
S10680'
S10680
D101'
D102'
VOUT
Optical black (34 pixels x 2) Dummy signal (74 pixels x 2) Effective pixels signal (10680 pixels x 2) 1-line output period (10786pixels x 2) Dummy signal (32 pixels x 2)
Note)The transfer pulses (1, 2) must have more than 10786 cycles. The transfer pulses (3, 4) must have more than 21572 cycles. VOUT indicates VOUT-R, VOUT-G, VOUT-B.
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D106'
D102
D20'
D74'
D75'
D78'
D79'
D80'
D20
D40
D74
D75
D79
D80
S1'
S1
9
CLP
ILX585K
Clock Timing Chart 3 1200 DPI Linear(pixel clamp mode)
ROG
5 0
3
1,L1,3
5 0 5 0 5 0 5
2,4
RS
CLP
0
S10679 S10680 D116 D117 D86 D50 D51 D52 D83 D84 D85 D1 D2 D3 S1 S2 D87
VOUT
1
2
4
10
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Optical black (34 pixels) Dummy signal (85 pixels) Effective pixel signal (10680 pixels) Dummy signal (32 pixels)
1-line output period (10797 pixels)
Note)
The transfer pulses (1, 2) must have more than 10797 cycles. VOUT indicates VOUT-R, VOUT-G, VOUT-B.
ILX585K
Clock Timing Chart 4 1200 DPI Linear(line clamp mode)
ROG
5 0
3
1,L1,3 5 0 2,4 5 0 5 0
RS
CLP
5
S10679
S10680
0
1
2
4
D116
Dummy signal (32 pixels)
VOUT Optical black (34pixels) Dummy signal (85 pixels)
Effective pixel signal (10680 pixels)
1-line output period (10797 pixels)
Note)
The transfer pulses (1, 2) must have more than 10797 cycles. VOUT indicates VOUT-R, VOUT-G, VOUT-B.
ILX585K
D117
D26
D25
D50
D83
D84
D85
D86
D51
D87
D1
S1
S2
11
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ILX585K
Clock Timing Chart5 2400 DPI Staggered
t4 t5
ROG t6 1 2 t7 t6
f
ClockTiming Chart 6 (2400 DPI pixel clamp mode)
t7, t9 1,fL1 t6, t8 2
f f
RS
CLP t18 t19 t20 Sub line Main line
VOUT
f
f
f
f
f
f
t2
t7 t3
t1
t6 t8
t7 t9
t15 t11 3 t10
4 t10 t16 t17 t14 t11 t12 t13
12
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ILX585K
ClockTiming Chart 7 (1200 DPI pixel clamp mode)
t7,t9,t11 1,fL1,f3
f
t6,t8,t10
2,f4 t6,t8,t10 t7,t9,t11
ClockTiming Chart 8 (2400 DPI line clamp mode)
t7, t9 1,L1 t6, t8 2 t7 t9 t6 t8
RS
CLP t18 t19 VOUT Sub line t20 Main line
f
f
f
t17 t16 RS
t10 t12 t14 t13
CLP
t18 t19 t20 Main line Main line
VOUT
t15 t11 3 t10
4 t10 t16 t17 t14 t11 t12 t13
13
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ILX585K
ClockTiming Chart 9 (1200 DPI line clamp mode)
t7,t9,t11 1,fL1,f3
f
t6,t8,t10
2,f4 t6,t8,t10 t7,t9,t11
f
f
f
t17 t16 RS
t12 t14
t13
CLP
t18 t19 t20 Main line Main line
VOUT
14
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ILX585K
Clock Pulse Recommended Timing

1 These timing is the recommended condition under fRS = 1MHz.
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ILX585K
Application Circuit

1
L1
4
CLP IC2 Tr1 VOUT-B
1 SW IC1
2
IC1 100 2 24 1 23 L 1
2
100
IC1 2
100
3k 2
22 4
21 CLP
20
19
18 NC
17 1
16 SW
15 GND
14 2
13 GND
GND VOUT -B
2 12V 1
3 2
RS 3
VDD 4
VOUT -R VOUT -G NC ROG -R ROG -G VDD 5 6 7 8 9 10
NC ROG -B 11 12
0.1F
47F/ 16V
3k 2 IC1 2 100 IC2 VOUT -R Tr1 100
100
100 IC2
100 IC2
3k VOUT -G
100 ROG -R ROG -G ROG -B
2
3
RS
Tr1 IC1: 74AC04 x 3pcs IC2: 74HC04 Tr1: 2SA1175
Data rate fRS = 1MHz
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
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ILX585K
Example of Representative Characteristics
<2400DPI> Spectral sensitivity characteristics (Standard characteristics) 1 0.9 0.8 0.7 Relative sensitivity 0.6 0.5 0.4 0.3 0.2 0.1 0 400 500 600 700 800 900 1000
R G B
Wavelength [nm]
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ILX585K
Notes of Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) Notes on Handling CCD Packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying static load to the package: (1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm
Cover glass Plastic portion 39N 29N 29N 0.9Nm
Ceramic portion (1)
Adhesive (2) (3) (4)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the package to crack or dust to be generated. (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. (5) Applying the metal a crash or a rub against the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. d) The notch of the plastic portion is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch or ceramic may overlap with the notch of the plastic portion. 3) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. 18
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ILX585K
4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
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Package Outline
24 pin DIP (400mil)
0 to 9
55.7 0.3 7.830 0.3 24 42.72 (4m X 10680Pixels) 13
10.0 0.3 10.16
Unit: mm
5.0 0.3
H
1 ( 8.59 )
12
4.0 0.5
1.778
5.334
0.46 0.3 M
1. The height from the bottom to the sensor surface is 2.38 0.3mm.
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER Plastic, Ceramic GOLD PLATING 42 ALLOY 5.43g LS-B41(E)
2. The thickness of the cover glass is 0.7mm, and the refractive index is 1.5.
4.28 0.5
3.58
0.25
V
No.1 Pixel (Green) of 2400 DPI
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ILX585K

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